Electrostatic Discharge (ESD) is a known problem in the manufacturing and the using of integrated circuits. Typically, transistors have thin oxides and insulating layers that can be damaged by ESD events, and special care is required to protect the integrated circuits from the damage caused by the ESD events.
Various devices have been used as ESD devices. For example, Resistor-Capacitor Metal-Oxide-Semiconductor (RC-MOS) devices were extensively used for the purpose of ESD protection. During the occurrence of ESD events, an RC-MOS device is biased such that the ESD current is shunted by the MOS transistor in the RC-MOS device, which MOS transistor works at an active MOS conduction mode. The MOS device is turned off during normal operations when no ESD transient occurs. Many configurations were adopted to tune the behavior of the RC-MOS devices, such as the timing, the boosted bias, the false trigger prevention ability, etc. The design of the ESD devices based on RC-MOS devices, however, is not straight forward, and large chip-area consumption is required. In addition, the RC-MOS devices may be triggered in error by the fluctuation in power supply.
Breakdown-mode devices such as MOS transistors, bipolar junction transistors (BJTs), and silicon-controlled rectifiers (SCRs) were also used as ESD devices since their It2 currents are high. It2 currents are measures of the ESD devices' ability to carry currents during the ESD events. Accordingly, the chip areas required for forming breakdown-mode devices are small, and the corresponding leakage currents are low. For example, a conventional ESD device may be formed of a BJT, which includes a high-voltage n-well (HVNW) region, a base pick-up region (an N+ region), a collector (a P+ region), and an emitter (a P+ region), wherein the base pick-up, the collector, and the emitter are formed over and contacting the HVNW region. The base pickup region and the HVNW region form the base of the BJT.
The breakdown-mode devices, however, typically have fixed design windows, which are the windows defined by the holding voltages and the triggering voltages of the ESD devices. The design windows were determined by process conditions and are difficult to adjust. For example, exemplary BJT devices may be used for the protection of a circuit having a VDD smaller than 15V and a breakdown voltage greater than 20V. These BJT devices, however, cannot be used for the circuits having a VDD voltage equal to 16V and a breakdown voltage equal to 21V. The fixed design window posts a problem for a chip having several circuits requiring different holding voltages and the triggering voltages.